• 专利附录
  • 专利说明
  • 权利要求
  • 类似技术
  • 同族专利
  • 引用文献
  • 法律状态
  • 优先权
    • 专利摘要:
    The manufacture of a photodetector is carried out on a substrate comprising a first portion (A) successively provided with a first semiconductor film (2), an electrically insulating layer (3), a second semiconductor film (4). ), a protective layer (5). The substrate also comprises a second portion (B) provided without the second semiconductor film (4). It also comprises a third portion (C) devoid of the second semiconductor film (4) and the protective layer (5). The second semiconductor film (4) is etched in the first portion (A) to form a cavity. A PIN / PIN-type diode (8) is formed in the third portion (C) at least by depositing a third semiconductor material (9) which also fills the cavity. A conversion layer is deposited to absorb a light signal from the second semiconductor film and convert the light signal to an electrical signal, the conversion layer electrically connecting the PIN / PIN diode (8).
    公开号:FR3015114A1
    申请号:FR1302934
    申请日:2013-12-13
    公开日:2015-06-19
    发明作者:Jean Michel Hartmann；Yann Bogumilowicz；Jean Marc Fedeli
    申请人:Commissariat a lEnergie Atomique CEA；Commissariat a lEnergie Atomique et aux Energies Alternatives CEA；
    IPC主号:
    专利说明:

    [0001] FIELD OF THE INVENTION The invention relates to a method for manufacturing a photodetector. STATE OF THE ART Conventionally, photo-detectors are used to convert a light signal into an electrical signal. The photodetector has a detection zone that converts the photons into electrons and an electrical treatment zone that collects the electrons to make an electrical signal for other circuits.
    [0002] The publication of Ren et al. "Thin Dielectric Spacer for the Monolithic Integration of Bulk Germanium or Germanium Quantum Wells With Silicon-on-Insulator Waveguides", IEEE Photonics Journal Vol. 3, No. 4, p. 739 (2011) describes a particular photodetector.
    [0003] A silicon on insulator substrate is provided and includes a silicon carrier, an electrically insulating layer, and a second silicon film. The second silicon film is etched a first time to form a waveguide. A second etching is performed to access the silicon support.
    [0004] In order to achieve better epitaxial growth, silicon oxide side spacers are formed at the edges of the trench. In this way, the selective growth of the germanium is carried out exclusively from the bottom of the trench, that is to say from the silicon support.
    [0005] The growth of the germanium is decomposed into a first P-doped germanium deposit, a second intrinsic germanium deposit and a third N-doped germanium deposit. This sequence of growth stages makes it possible to form a PIN-type diode.
    [0006] The intrinsic part of the diode faces the waveguide. However, we note that this configuration is not as effective as expected. It is also noted that the manufacturing process is complicated to implement. OBJECT OF THE INVENTION The object of the invention is to present a method of manufacturing a photodetector which is easier to implement. This result is achieved by means of a method comprising: providing a substrate comprising: a first portion successively provided with a first semiconductor film, an electrically insulating layer, a second semiconductor film, a layer of protection, o a second portion successively provided with the first semiconductor film, the electrically insulating layer, the protective layer and devoid of the second semiconductor film, o a third portion provided with the first semiconductor film, and devoid of the second semiconductor film and protective layer, partially etch the second semiconductor film in the first portion to form a cavity, depositing at least one third semiconductor material so as to form a PIN or PIN type diode in the third portion from the first semiconductor film and fill the cavity of the first portion, deposit a conversion layer configured in. ur absorb a light signal from the second semiconductor film and convert the light signal into electrical signal, the conversion layer electrically connecting the PIN or PIN type diode to form a PIPIN or NINIP type structure. BRIEF DESCRIPTION OF THE DRAWINGS Other advantages and features will emerge more clearly from the following description of particular embodiments of the invention given by way of nonlimiting example and represented in the accompanying drawings, in which: FIG. schematically, in cross-section of a stack of layers used for the manufacture of a photodetector, FIGS. 2, 7, 11, 12 and 13 schematically represent, in cross-section, the steps for producing a photodetector; 3 to 6 are a diagrammatic cross-sectional representation of the steps for producing a particular substrate that can be used for the manufacture of a photodetector. FIGS. 8 and 9 show, schematically, in cross-section, alternative manufacturing steps to steps 11 and 12, FIG. 10 schematically represents a view from above of the substrate rs of the step illustrated in Figure 9, Figure 14 shows schematically in top view, the substrate during the step illustrated in Figure 13.
    [0007] DETAILED DESCRIPTION FIG. 1 shows a substrate 1 successively comprising a first semiconductor film 2, an electrically insulating layer 3, a second semiconductor film 4 and a protection layer 5. The four layers are of different natures to define an interface between two consecutive layers.
    [0008] The first semiconductor film 2 can form the support of the substrate 1 or it is deposited on the support of the substrate 1. The first semiconductor film 2 is advantageously monocrystalline in order to produce a diode of better quality. Preferably, the first semiconductor film 2 comprises or is connected to a circuit for processing the electrical signal emitted by the photodetector. The first semiconductor film 2 is for example silicon, but it is also possible to use other semiconducting materials of valence IV or other suitable materials.
    [0009] The electrically insulating layer 3 may be formed by any suitable material, for example by an oxide, a nitride, a mixture of these. By way of example, the electrically insulating layer 3 may be made of silicon oxide or silicon nitride.
    [0010] The second semiconductor film 4 is intended to form a waveguide on the electrically insulating layer 3. The second semiconductor film 4 is advantageously monocrystalline in order to limit the attenuation of the light signal. Preferably, the second semiconductor film 4 is connected to a light signal generator (not shown). The second semiconductor film 4 is for example silicon, but it is also possible to use other semiconducting materials of valence IV or other suitable materials. The stack presented can be achieved simply by means of a substrate 1 of semiconductor on insulator type and more particularly of the silicon on insulator type.
    [0011] The protective layer 5 may be formed by any suitable material. The protective layer 5 may be formed by an electrically conductive or electrically insulating material. Preferably, an electrically insulating material is used. The protective layer 5 may be oxide, nitride, metal material or silicide. Preferably, the protective layer 5 is made of silicon oxide or silicon nitride. The refractive indices of the protective layer 5, the second semiconductor film 4 and the electrically insulating layer 3 are chosen so that the second semiconductor film 4 forms a waveguide. Advantageously, the materials are chosen so that the second semiconductor film 4 is a waveguide for radiation having a wavelength greater than 1100 nm.
    [0012] As illustrated in FIG. 2, the substrate 1 can be decomposed into at least three different portions that have different stacks. The three portions are distinct.
    [0013] In a first portion A, the stack comprises successively the first semiconductor film 2, the electrically insulating layer 3, the second semiconductor film 4, the protective layer 5. In a second portion B, the stack comprises successively the first semiconductor film 2, the electrically insulating layer 3, the protective layer 5. The second portion B is devoid of a second semiconductor film 4. The second portion B is distinct from the first portion A. In a third portion C, the stack comprises the first semi-conductive film 2. The third portion C is devoid of protective layer 5 and second semiconductor film 4. The first semiconductor film 2 can be left free or it can be covered by a layer 6. The purpose of the cover layer 6 is to protect the first semiconductor film 2 during the next technological steps and more particularly during the steps of the first semiconductor film. VING. The cover layer 6 may be formed by any suitable material. The cover layer 6 may be formed by the electrically insulating layer 3 and advantageously by a thinned zone of the electrically insulating layer 3. Alternatively, another material may be used. The third portion C is distinct from the first and second portions A and B.
    [0014] The substrate 1 can be made in different ways. A simple and quick process to implement is described. A semiconductor-type substrate 1 of the insulator is provided (FIG. 1). As illustrated in FIG. 3, the substrate 1 is covered by a first etching mask 10. As illustrated in FIG. 4, a first etching is performed to etch the second semiconductor film 4 and define the shape of the waveguide . The first etching mask 10 makes it possible to define the shape or substantially the shape of the first portion A.
    [0015] As illustrated in FIG. 5, the protective layer 5 is deposited and a second etching mask 11 is formed. A second etching is performed to define the shape of the third portion C and possibly access the first semiconductor film 2. Advantageously, the protective layer 5 covers the side faces and the upper face of the waveguide. The drawing of the area to be etched by means of the second etching mask 11 (the third portion C) advantageously overlaps the drawing of the area to be preserved of the first etching mask 10. In this configuration illustrated in FIG. eliminates the protective layer 5 above and beside an end of the waveguide which becomes accessible. In this configuration, the waveguide stops at the interface between the first portion A and the third portion C.
    [0016] As illustrated in FIG. 7, an etching is carried out so as to partially eliminate the second semiconductor film 4 in the first portion A. The etching of the second semiconductor film 4 may be performed by any suitable technique.
    [0017] For example, the etching is performed by plasma etching. As a variant, the etching is carried out using gaseous hydrochloric acid, which makes it possible to etch materials such as silicon or silicon-germanium with a good etch selectivity with respect to silicon oxide or silicon nitride.
    [0018] When the protective layer 5 covers the lateral faces and the upper face of the waveguide, the partial etching makes it possible to create a cavity emerging in the protective layer 5.
    [0019] Advantageously, the etching of the second semiconductor film 4 is carried out with gaseous hydrochloric acid, which makes it possible to avoid the formation of etching byproducts on the substrate, such as polymers. Advantageously, the step of etching the second semiconductor film 4 is performed with protection of the first semiconductor film 2 by the cover layer 6. However, it is also conceivable to have the etching of the second semi-conducting film 4. conductor 4 without protection of the first semiconductor film 2. In this second case, it is advantageous to have a higher etch rate for the second semiconductor film 4 than for the first semiconductor film 2.
    [0020] In a particular embodiment, the accessible face of the first semiconductor film 2 is in a plane (100) while the accessible face of the second semiconductor film 4 is in a plane (110) which makes it possible to have a difference of engraving speed. In addition to a difference in crystal planes, it is also possible to use a difference in chemical compositions to obtain a difference in etch rates. At least one third semiconductor material 7 is deposited so as to form a PIN-type diode 8 in the third zone C. The third semiconductor material 7 is deposited on the first semiconductor film 2 so as to electrically connect the pin-type diode 8 with the first semiconductor film 2. The PIN-type diode 8 comprises successively a first P-type doped 8P electrode, an intrinsic zone 81 and a second N-type 8N electrode. The direction of the PIN diode may vary. according to the embodiments. It is therefore possible to form a PIN or PIN diode if the order of the layers is observed from the first semiconductor film 2.
    [0021] If the first semiconductor film 2 is covered by the cover layer 6, an additional etching is performed to release this surface of the film 2. For example, this etching may be performed by hydrofluoric acid diluted in the water if the cover layer 6 is based on silicon oxide.
    [0022] The PIN type diode 8 can be formed in different ways. In a first embodiment illustrated in FIG. 8, an implantation is made to dope the first semiconductor film 2 and form the first electrode 8. The first electrode may be of the N or P (8N / P) type. Advantageously, the cover layer 6 is retained to carry out the ion implantation in the first semiconductor film 2.
    [0023] As illustrated in FIG. 9, the third intrinsic semiconductor material 7 is then deposited in the third portion C. In a first variant, a doped material is deposited to form the second P or N electrode (8P / N). In another variant, an ion implantation is performed to dope part of the intrinsic material 7 and form a doped zone of P or N type (8P / N). FIG. 10 is a top view, in a section taken along the plane AA, of the arrangement of the waveguide with respect to the cavity formed in the protective layer 5. For the sake of simplicity, it is abstracted from the protective layer 5 above the waveguide.
    [0024] It is advantageous to dope the first semiconductor film 2 if the latter is not doped enough to form the N or P electrode or if it is doped of the opposite type. For example, if the first semiconductor film 2 is P-doped, it is advantageous to perform an ion implantation of N-type dopants to form a first N-type 8N electrode. In a second embodiment, the third material Semiconductor 7 is intrinsically deposited. An ion implantation is then performed to form an 8N / P doped zone and then another implantation is performed to form another 8P / N doped zone. During the deposition of the third semiconductor material 7, there is also deposition in the first portion A from the second semiconductor film 4. In another variant embodiment illustrated in FIGS. 11 and 12, the layers forming the diode 8 are deposited doped one after the other. There is then deposited an N or P doped layer, an intrinsic layer and a P or N doped layer. The stack formed in the third portion C vertically is found in the first portion A in a manner similar to that of FIG. horizontal. 301 5 1 1 4 10 The different layers deposited to form the PIN diode are visible in the waveguide. It is therefore advantageous to make these layers in a material that has low absorption of light radiation to maximize the absorption of photons in the conversion zone. Advantageously, the materials in the waveguide are not doped, or weakly doped, that is to say with a doping less than or equal to 10.1018 at / cm3 or 10.1017 at / cm3. In a preferred embodiment, the materials deposited to form the PIN 8 diode are the same materials used to form the waveguide. As illustrated in FIGS. 13 and 14, after the formation of the diode 8 PIN, it is advantageous to form the conversion material 9 which will achieve the absorption 15 of the photons and their conversion into electric charges. The conversion material 9 is also called detection material. The detection material 9 is deposited in the third portion C above the PIN 8 diode and in electrical contact with the latter such that the created charges pass through the PIN diode. The conversion material 9 is doped in part in order to prolong the direction of propagation of the charge carriers. The conversion material 9 is doped so that it forms the diode 8 or structure PIPIN or NINIP. The doped area 9P / N of the detection material is of the same type as the second electrode 8P / N of the PIN diode, that is to say the electrode closest to the waveguide. As previously, the detection material 9 may be intrinsically deposited and then doped, for example, by ion implantation. It is also possible to first deposit an intrinsic material and then deposit a doped material which will form the 9P / N electrode.
    [0025] The detection material 9 is also in direct contact with the waveguide so as to directly receive the light signal to convert it into an electrical signal. This direct connection makes it possible to increase the efficiency of the photodetector.
    [0026] The detection material 9 is in the extension of the waveguide so as to receive the maximum of light signal. In an advantageous embodiment, the interface between the diode 8 PIN and the conversion material 9 is in the same plane as the interface between the electrically insulating layer 3 and the second semiconductor film 4. In this way, the conversion layer 9 is facing the waveguide to receive the maximum light signal in order to efficiently transform it into electrical charges.
    [0027] In a more optically advantageous variant embodiment, the interface between the conversion layer 9 and the PIN diode 8 is disposed under the interface between the electrically insulating layer 3 and the second semiconductor film 4.
    [0028] In another less optically advantageous variant embodiment, the interface between the conversion layer 9 and the PIN diode 8 is disposed above the interface between the electrically insulating layer 3 and the second semiconductor film 4. In this way, the conversion layer 9 partially absorbs the light radiation and the material forming the diode 8 also receives a portion of the light radiation. In this configuration, the conversion efficiency is less good. In a preferred embodiment, the interface between the waveguide and the conversion layer 9 is in the extension of the side wall of the electrically insulating layer 3 or substantially in the extension of the side wall. Advantageously, the waveguide is present only in the first portion A and the conversion layer 9 is present only in the third portion C. However, in another embodiment, the third portion C may be between two first portions. AT.
    [0029] If the conversion material 9 strongly encroaches in the first portion A, the absorption of the light radiation produced in the first portion A and the electric charges formed in the first portion A hardly arrive at the diode 8 PIN. This architecture does not have a good conversion efficiency.
    [0030] In an advantageous embodiment, the growth of the various layers is carried out epitaxially so as to reproduce the crystalline mesh of the starting surface. In this way, the PIN type diode 8 has the same crystalline structure as that of the first semiconductor film 2. The same is true for the deposited material and which prolongs the engraved waveguide. It is then particularly advantageous to use first and second monocrystalline semiconductor films. In this case, the conversion layer 9 comprises a part with the same crystalline structure as that of the first semiconductor film 2 and a part with the same crystalline structure as that of the second semiconductor film 4 (even if the parameters mesh are not identical). It has been unexpectedly observed that in the conversion layer 9, the coexistence of the crystal lattice from the waveguide with the crystal lattice from the first semiconductor film 2 does not introduce crystal defects strongly limiting the conversion. from the light signal to an electrical signal. To form the photodetector, it is preferable to carry out one or more selective epitaxial steps in order to form the PIN 8 diode and / or the conversion material 9. The use of selective growth makes it possible to have crystal growth only from the seed crystal. There is therefore little or no growth from the surfaces of amorphous material. The use of crystal growth makes it possible to form a PIN 8 diode with parallel interfaces between them, which improves its operation. This eventually makes it possible to form a completely monocrystalline NINIP or PIPIN diode which is advantageous for reducing the electronic noise of the diode. It is the same for the waveguide which is more efficient if the grain boundaries and crystal defects are reduced in the path of the light signal. Selective growth can be achieved in a variety of ways, for example by means of a chemistry employing chlorinated precursors which is known to be intrinsically selective.
    [0031] Alternatively, it is also possible to achieve selective growth by alternating non-selective growth phases and selective etching phases. During the selective etch phase, the monocrystalline material is less etched than the polycrystalline material or the amorphous material.
    [0032] When forming the conversion layer 9, it is preferable to completely fill the cavity formed by the protective layer 5. In this way, a large amount of material can be used to effectively convert the light signal into an electrical signal. In order to ensure optimum filling of the cavity, it is preferable to carry out a growth of the conversion layer 9 which protrudes beyond the protective layer 5. This precaution makes it possible in general to ensure the filling of the cavity itself. if the deposited material has growth with facets.
    [0033] Subsequently, it is possible to locate the conversion layer 9 in the hole delimited by the protective layer 5 by means of a flattening step.
    [0034] The planarization can be achieved by any suitable technique, for example by means of a chemical mechanical polishing step. In comparison with the structure disclosed in Ren et al. mentioned above, it is found that the performance is improved because there is no lateral spacer between the waveguide and the conversion zone 9. In this way, there is no generation of an interface additional optics that introduces optical reflections that decrease the sensitivity of the diode.
    [0035] It can be seen that the photodetector may have a PIN diode 8 formed in a material different from the conversion material 9, for example germanium, which facilitates the formation of an avalanche device in which high voltages are applied. In a preferred embodiment, the N and P electrodes and the intrinsic zone are formed in a silicon-based material which allows the formation of an effective avalanche photodetector. It is also noted that the etching of the waveguide before forming the diode 8 PIN makes it possible to avoid parasitic growth of material in the third portion C with important facets. These facets impede the growth of the conversion layer 9. It is also found that the use of a second portion B devoid of second semiconductor material 4 makes it possible to limit the number of semiconductor material surfaces that open into the the third portion C. This configuration makes it possible to limit the risks of generating crystalline defects during the various growth stages. In the illustrated embodiment, there is only one waveguide that opens onto the conversion material 9.
    权利要求:
    Claims (7)
    [0001]
    REVENDICATIONS1. A method of manufacturing a photodetector, comprising the steps of: providing a substrate (1) comprising: a first portion (A) successively provided with a first semiconductor film (2), an electrically insulating layer (3); ), a second semiconductor film (4), a protective layer (5), o a second portion (B) successively provided with the first semiconductor film (2), the electrically insulating layer (3), the protection (5) and devoid of the second semiconductor film (4), o a third portion (C) provided with the first semiconductor film (2), and devoid of the second semiconductor film (4) and the protective layer ( 5) partially etching the second semiconductor film (4) in the first portion (A) to form a cavity, depositing at least one third semiconductor material (7) so as to form a PIN-type diode (8); PIN in the third portion (C) from the first semiconductor film (2) and fill the cavity of the first portion, depositing a conversion layer (9) configured to absorb a light signal from the second semiconductor film (4) and converting the light signal into an electrical signal, the conversion layer (9) electrically connecting the diode (8) PIN or PIN type to form a PIPIN or NINIP type structure.
    [0002]
    2. Manufacturing method according to claim 1, characterized in that the interface between the conversion layer (9) and the upper electrode of the diode (8) PIN or NIP is in the same plane as the interface between lacouche electrically insulating (3) and the second semiconductor film (4).
    [0003]
    3. Manufacturing method according to one of claims 1 and 2, characterized in that it comprises the formation of the lower electrode of the diode (8) PIN or NIP ion implantation of the first semiconductor film (2). in the third portion (C).
    [0004]
    4. Manufacturing method according to any one of claims 1 to 3, characterized in that the interface between the conversion layer (9) and the third semiconductor material (4) is in the same plane as the side face of the electrically insulating layer (3).
    [0005]
    5. Manufacturing process according to any one of claims 1 to 4, wherein the diode (8) PIN or NIP is formed by a stack of monocrystalline layers based on silicon and wherein the first semiconductor film (2) is monocrystalline.
    [0006]
    6. The manufacturing method according to claim 5, characterized in that the conversion layer (9) is germanium.
    [0007]
    7. Production method according to one of claims 1 to 6, characterized in that the conversion layer (9) has a part with the same crystalline structure as the first semiconductor film (2) and a part with the same crystalline structure as the second semiconductor film (4).
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    同族专利:
    公开号 | 公开日
    US9246045B2|2016-01-26|
    US20150171259A1|2015-06-18|
    EP2884547A1|2015-06-17|
    FR3015114B1|2016-01-01|
    EP2884547B1|2016-11-09|
    引用文献:
    公开号 | 申请日 | 公开日 | 申请人 | 专利标题
    US20070104441A1|2005-11-08|2007-05-10|Massachusetts Institute Of Technology|Laterally-integrated waveguide photodetector apparatus and related coupling methods|
    US20110012221A1|2008-03-07|2011-01-20|Junichi Fujikata|SiGe PHOTODIODE|
    US20120126286A1|2010-11-22|2012-05-24|Intel Corporation|Monolithic three terminal photodetector|
    US9117946B2|2013-01-15|2015-08-25|International Business Machines Corporation|Buried waveguide photodetector|
    US9229164B2|2013-04-23|2016-01-05|Globalfoundries Inc.|Butt-coupled buried waveguide photodetector|CN105122469B|2013-04-19|2017-03-08|富士通株式会社|Semiconductor light-receiving device and its manufacture method|
    JP6600476B2|2015-03-30|2019-10-30|ルネサスエレクトロニクス株式会社|Semiconductor device and manufacturing method thereof|
    US9466753B1|2015-08-27|2016-10-11|Globalfoundries Inc.|Photodetector methods and photodetector structures|
    CN105679875B|2016-03-08|2017-03-01|昆明理工大学|A kind of integrated silicon substrate single-photon detector of waveguide|
    法律状态:
    2015-12-31| PLFP| Fee payment|Year of fee payment: 3 |
    2016-12-29| PLFP| Fee payment|Year of fee payment: 4 |
    2018-01-02| PLFP| Fee payment|Year of fee payment: 5 |
    2019-12-31| PLFP| Fee payment|Year of fee payment: 7 |
    2020-12-28| PLFP| Fee payment|Year of fee payment: 8 |
    2021-12-31| PLFP| Fee payment|Year of fee payment: 9 |
    优先权:
    申请号 | 申请日 | 专利标题
    FR1302934A|FR3015114B1|2013-12-13|2013-12-13|METHOD FOR MANUFACTURING A PHOTO-DETECTOR|FR1302934A| FR3015114B1|2013-12-13|2013-12-13|METHOD FOR MANUFACTURING A PHOTO-DETECTOR|
    EP14197696.9A| EP2884547B1|2013-12-13|2014-12-12|Method for manufacturing a photodetector|
    US14/570,324| US9246045B2|2013-12-13|2014-12-15|Method for fabricating a photodetector|
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